The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2020

Filed:

Feb. 15, 2017
Applicant:

Centec Networks (Su Zhou) Co., Ltd., Jiangsu, CN;

Inventor:

Jun Xu, Jiangsu, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G06F 3/06 (2006.01); G11C 11/419 (2006.01); G06F 12/06 (2006.01); H03K 19/21 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0604 (2013.01); G06F 3/0673 (2013.01); G06F 12/06 (2013.01); G11C 11/419 (2013.01); H03K 19/21 (2013.01);
Abstract

The present invention provides a data processing method and system for a 2R1W memory. The data processing method comprises: selecting 2n+1 SRAM2P memories with the same depth and width in accordance with a depth and a width of the 2R1W memory to construct a hardware architecture of the 2R1W memory, one of the plurality of SRAM2P memories being an auxiliary memory, and the rest of the SRAM2P memories being main memories; and when the data are written in and/or read from the 2R1W memory, associating data in the main memories and data in the auxiliary memory in accordance with a current pointer address of the data and performing an XOR operation on the associated data to complete data writing and reading. Only extra ½n of the memory area is required to construct the 2R1W memory based on a conventional SRAM unit.


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