The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Mar. 28, 2019
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Samet Zihir, San Diego, CA (US);

Kevin Sheng, San Jose, CA (US);

Mark Cuezon, San Diego, CA (US);

Himanshu Khatri, San Diego, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/28 (2006.01); H04W 16/28 (2009.01); H04B 7/185 (2006.01); H01Q 3/26 (2006.01); H04W 72/04 (2009.01);
U.S. Cl.
CPC ...
H04W 16/28 (2013.01); H01Q 3/2658 (2013.01); H04B 7/18513 (2013.01); H04W 72/046 (2013.01);
Abstract

An apparatus comprises a plurality of transceiver circuits, a memory, and an interface circuit. The memory generally embodies a table associating a plurality of index values with corresponding gain and phase values for each channel of each of the transceiver circuits. In a first mode, the interface circuit may be configured to receive the corresponding gain and phase values associated with each of the plurality of index values and store the corresponding gain and phase values in the table. In a second mode, the interface circuit, in response to receiving one of the index values, configures each channel of each of the transceiver circuits with the corresponding gain and phase values from the table.


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