The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 2020
Filed:
Apr. 18, 2019
Hrl Laboratories, Llc, Malibu, CA (US);
Geoffrey P. McKnight, Los Angeles, CA (US);
Andrew C. Keefe, Encino, CA (US);
Alexander R. Gurga, Canoga Park, CA (US);
Ryan Freeman, Los Angeles, CA (US);
HRL Laboratories, LLC, Malibu, CA (US);
Abstract
A method of manufacturing a curved semiconductor die includes: designing a semiconductor die design by conducting finite element analysis of an initial semiconductor die design having a partial spherical curvature, the initial semiconductor die design including a shape of a semiconductor die and a location and shape of a slit in the semiconductor die; when a size of a gap at the slit in the curved semiconductor die is outside a tolerance, modifying the initial semiconductor die design to provide a revised semiconductor die design and conducting another finite element analysis thereof; when the size of the gap at the slit in the curved semiconductor die is within the tolerance, manufacturing a microfabrication mask utilizing the initial semiconductor die design or the revised semiconductor die design having the size of the gap within the tolerance; forming a semiconductor die by utilizing the microfabrication mask; and curving the semiconductor die.