The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Mar. 29, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Philip G. Emma, Danbury, CT (US);

Hillery C. Hunter, Chappaqua, NY (US);

John U. Knickerbocker, Monroe, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 25/00 (2006.01); G11C 29/00 (2006.01); G11C 29/56 (2006.01); H01L 23/498 (2006.01); H01L 23/367 (2006.01); H01L 23/544 (2006.01); G02B 6/122 (2006.01); H01L 25/18 (2006.01); H01L 21/78 (2006.01); G11C 29/52 (2006.01); G11C 11/401 (2006.01); G11C 29/42 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); G02B 6/122 (2013.01); G11C 29/006 (2013.01); G11C 29/56016 (2013.01); H01L 21/78 (2013.01); H01L 23/3675 (2013.01); H01L 23/49838 (2013.01); H01L 23/544 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); G11C 11/401 (2013.01); G11C 29/42 (2013.01); G11C 29/52 (2013.01); H01L 2223/54453 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06589 (2013.01);
Abstract

Examples of techniques for an integrated wafer-level processing system are disclosed. In one example implementation according to aspects of the present disclosure, an integrated wafer-level processing system includes a memory wafer and a processing element connected to the memory wafer via a data connection.


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