The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10748864 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 18, 2020

Filed:

Oct. 05, 2016
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Thomas Fairfax Long, Gresham, OR (US);

Jeffrey Peter Gambino, Portland, OR (US);

Charles Alvah Hill, Portland, OR (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 24/17 (2013.01); H01L 23/3157 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/25 (2013.01); H01L 24/81 (2013.01); H01L 24/94 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/11472 (2013.01); H01L 2224/13005 (2013.01); H01L 2224/13012 (2013.01); H01L 2224/13013 (2013.01); H01L 2224/13015 (2013.01); H01L 2224/13017 (2013.01); H01L 2224/13019 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/14131 (2013.01); H01L 2224/1607 (2013.01); H01L 2224/16056 (2013.01); H01L 2224/16105 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/73104 (2013.01); H01L 2224/81141 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83193 (2013.01); H01L 2224/94 (2013.01);
Abstract

Implementations of a semiconductor package may include: a first wafer having a first surface and a first set of blade interconnects, the first set of blade interconnects extending from the first surface. The package may include a second wafer having a first surface and a second set of blade interconnects, the second set of blade interconnects extending from the first surface and oriented substantially perpendicularly to a direction of orientation of the first set of blade interconnects. The first set of blade interconnects may be hybrid bonded to the second set of blade interconnects at a plurality of points of intersection between the first and second set of blade interconnects. The plurality of points of intersection may be located along a length of each blade interconnect of the first set of blade interconnects, and along the length of each blade interconnect of the second set of blade interconnects.


Find Patent Forward Citations

Long, Thomas. (2020). Bonded semiconductor package and related methods (U.S. Patent No. 10748864). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10748864

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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