The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Feb. 22, 2019
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Lei Lin, Fremont, CA (US);

Zhuojie Li, San Jose, CA (US);

Tai-Yuan Tseng, Milpitas, CA (US);

Henry Chin, Fremont, CA (US);

Gerrit Jan Hemink, San Ramon, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 16/26 (2006.01); G11C 11/56 (2006.01); H01L 27/11565 (2017.01); H01L 27/1157 (2017.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 16/0483 (2013.01); G11C 16/3459 (2013.01); G11C 11/5671 (2013.01); G11C 16/26 (2013.01); G11C 2211/5621 (2013.01); H01L 27/1157 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01);
Abstract

Techniques are provided for predictively programming of non-volatile memory, which may reduce the number of verify operations. In one aspect, a programming circuit is configured to program memory cells to a verify low voltage and to program a set of the memory cells to target states. The set comprises memory cells having a threshold voltage between the verify low voltage and a verify high voltage. To program the set of the memory cells to the target states, the programming circuit is configured to apply two or more program pulses to memory cells in the set without verifying whether the memory cells have reached their respective target states, including: apply a first and second program enable voltages to the bit lines associated with the memory cells having different strengths.


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