The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Mar. 07, 2018
Applicant:

Liqid Inc., Broomfield, CO (US);

Inventors:

Christopher R. Long, Colorado Springs, CO (US);

Jason Breakstone, Broomfield, CO (US);

Andrew Rudolph Heyd, Longmont, CO (US);

Brenden Michael Rust, Loveland, CO (US);

Seth Walsh, Superior, CO (US);

Bryan Schramm, Broomfield, CO (US);

Assignee:

Liqid Inc., Broomfield, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/20 (2006.01); G06F 13/40 (2006.01); G06F 11/20 (2006.01); G06F 13/42 (2006.01); G06F 1/26 (2006.01); G06F 11/30 (2006.01); G06F 1/18 (2006.01); H05K 7/20 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4022 (2013.01); G06F 1/188 (2013.01); G06F 1/206 (2013.01); G06F 1/266 (2013.01); G06F 11/2007 (2013.01); G06F 11/3006 (2013.01); G06F 11/3058 (2013.01); G06F 11/3062 (2013.01); G06F 13/4282 (2013.01); G06F 13/4295 (2013.01); G06F 1/20 (2013.01); G06F 11/3055 (2013.01); G06F 2201/805 (2013.01); G06F 2213/0026 (2013.01); H01L 23/367 (2013.01); H05K 7/20727 (2013.01);
Abstract

Rackmount Peripheral Component Interconnect Express (PCIe) switch assemblies are provided herein. One example PCIe switch assembly includes an enclosure that encases elements of the PCIe switch assembly, a first plurality of PCIe interconnect ports positioned on a front side of the PCIe switch assembly, and a second plurality of PCIe interconnect ports positioned on a rear side of the PCIe switch assembly. One or more redundancy cross-link ports are provided to handle failover traffic with at least another PCIe switch assembly. PCIe switch circuitry is communicatively coupled to the first plurality of PCIe interconnect ports and the second plurality of PCIe interconnect ports that form a cluster interconnect PCIe fabric. A control processor is configured to control operation of at least the PCIe switch circuitry and the one or more redundancy cross-link ports.


Find Patent Forward Citations

Loading…