Method and apparatus for non-volatile memory array improvement using a command aggregation circuit

Abstract

A queue-based non-volatile memory (NVM) hardware assist card, information handling system, and method are disclosed herein. An embodiment of the queue-based NVM hardware assist card includes a plurality of downstream ports configured to be connected to a corresponding plurality of actual queue-based NVM storage devices, a plurality of upstream ports configured to appear as a plurality of apparent queue-based NVM storage devices, and a distinct upstream port of a different type than the plurality of upstream ports, the distinct upstream port for interacting with a host processor to receive a consolidated processing NVM command from and to return a consolidated processing NVM command completion indication, the queue-based NVM hardware assist card configured to aggregate multiple of the NVM command completion messages received via respective ones of the plurality of downstream ports from respective ones of the plurality of actual queue-based NVM storage devices and to generate the consolidated processing NVM command completion indication.