The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Mar. 21, 2019
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventor:

Julian M. Kain, Longmont, CO (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/41 (2018.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 8/445 (2013.01); G06F 8/4434 (2013.01); G06F 9/5033 (2013.01);
Abstract

An example method of implementing an application for a hardware accelerator having a programmable device coupled to memory is disclosed. The method includes compiling source code of the application to generate logical circuit descriptions of kernel circuits; determining resource availability in a dynamic region of programmable logic of the programmable device, the dynamic region exclusive of a static region of the programmable logic programmed with a host interface configured to interface a computing system having the hardware accelerator; determining resource utilization by the kernel circuits in the dynamic region; determining fitting solutions of the kernel circuits within the dynamic region, each of the fitting solutions defining connectivity of the kernel circuits to banks of the memory; adding a memory subsystem to the application based on a selected fitting solution of the fitting solutions; and generating a kernel image configured to program the dynamic region to implement the kernel circuits and the memory subsystem.


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