The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2020

Filed:

Sep. 19, 2018
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Satyaprakash Pareek, Campbell, CA (US);

Anup Hosangadi, San Jose, CA (US);

Bing Tian, San Jose, CA (US);

Ashish Sirasao, San Jose, CA (US);

Yao Fu, Castro Valley, CA (US);

Oscar Fernando C. Fernandez, Ithaca, NY (US);

Michael Wu, Palo Alto, CA (US);

Christopher H. Dick, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06F 7/499 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 7/49915 (2013.01); G06F 7/5443 (2013.01); G06F 9/3001 (2013.01); G06F 9/3887 (2013.01);
Abstract

Circuits and method for multiplying floating point operands. An exponent adder circuit sums a first exponent and a second exponent and generates an output exponent. A mantissa multiplier circuit multiplies a first mantissa and a second mantissa and generates an output mantissa. A first conversion circuit converts the output exponent and output mantissa into a fixed point number. An accumulator circuit sums contents of an accumulation register and the fixed point number into an accumulated value and stores the accumulated value in the accumulation register.


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