The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

May. 23, 2019
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventor:

Avdhesh Chhodavdia, Freemont, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/17736 (2020.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
H03K 19/1774 (2013.01); G06F 1/10 (2013.01);
Abstract

Systems, circuits, and methods for clock domain crossing for an interface between logic circuits are provided. A circuit is configured to allow an exchange of signals between a first logic circuit clocked using a first clock signal having a first frequency and a second logic circuit clocked using a second clock signal having a second frequency different from the first frequency. The circuit includes a first circuit segment configured to receive a first control signal to select the second logic circuit and a second control signal to indicate an initiation of an access operation, and ensure that the second control signal maintains a relationship with the first control signal based on the second clock signal. The circuit further includes a second circuit segment configured to receive, from the second logic circuit, a third control signal indicating a readiness of the second logic circuit to complete the access operation.


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