The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Mar. 18, 2019
Applicant:

Murata Manufacturing Co., Ltd., Kyoto, JP;

Inventors:

Takaya Wada, Kyoto, JP;

Koji Nosaka, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 9/64 (2006.01); H03H 9/60 (2006.01); H03H 9/02 (2006.01); H03H 9/54 (2006.01); H03H 9/05 (2006.01); H03H 9/56 (2006.01); H03H 9/72 (2006.01); H03H 9/145 (2006.01);
U.S. Cl.
CPC ...
H03H 9/6483 (2013.01); H03H 9/02007 (2013.01); H03H 9/0542 (2013.01); H03H 9/0557 (2013.01); H03H 9/542 (2013.01); H03H 9/568 (2013.01); H03H 9/605 (2013.01); H03H 9/64 (2013.01); H03H 9/6403 (2013.01); H03H 9/72 (2013.01); H03H 9/02834 (2013.01); H03H 9/14541 (2013.01); H03H 2009/02173 (2013.01);
Abstract

A filter includes a series-arm resonator located on a path that connects an input/output terminal () with an input/output terminal (), and a first parallel-arm resonant circuit connected between a node, which is located on the path, and ground. The first parallel-arm resonant circuit includes a parallel-arm resonator, and a pair of a capacitor and a switch connected in parallel with each other and in series with the parallel-arm resonator between the parallel-arm resonator and ground. An interconnect line (a) is connected to the input/output terminal (), and an interconnect line (a) is connected to the input/output terminal. The parallel-arm resonator and the switch are connected by an interconnect line (a). The interconnect line (a) has a characteristic impedance lower than a characteristic impedance of the interconnect line (a) or a characteristic impedance of the interconnect line (a).


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