The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Aug. 15, 2017
Applicant:

Faquir Chand Jain, Storrs, CT (US);

Inventor:

Faquir Chand Jain, Storrs, CT (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/06 (2010.01); H01L 33/18 (2010.01); H01L 33/34 (2010.01); H01L 29/788 (2006.01); H01L 29/15 (2006.01); H01L 29/423 (2006.01); H01L 33/28 (2010.01); H01L 29/12 (2006.01); B82Y 10/00 (2011.01); H01L 29/16 (2006.01); H01L 29/20 (2006.01); H01L 29/10 (2006.01); H01L 21/28 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 33/08 (2010.01); H01L 29/775 (2006.01); H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
H01L 33/06 (2013.01); B82Y 10/00 (2013.01); H01L 29/0665 (2013.01); H01L 29/1033 (2013.01); H01L 29/127 (2013.01); H01L 29/15 (2013.01); H01L 29/16 (2013.01); H01L 29/20 (2013.01); H01L 29/40114 (2019.08); H01L 29/40117 (2019.08); H01L 29/4234 (2013.01); H01L 29/42324 (2013.01); H01L 29/788 (2013.01); H01L 33/18 (2013.01); H01L 33/28 (2013.01); H01L 33/34 (2013.01); H01L 29/0673 (2013.01); H01L 29/66825 (2013.01); H01L 29/7613 (2013.01); H01L 29/775 (2013.01); H01L 33/08 (2013.01);
Abstract

This CIP application builds on Ge quantum dot superlattice (QDSL) based field effect transistors where Ge quantum dot arrays are used as a high carrier mobility channel. The QDSL diodes claims that were withdrawn are included. The diodes are used as light emitting devices and photodetectors. A combination of QDC-FETs, light emitting devise, photodetectors are vertically stacked to form a versatile 3-dimensional integrated circuit. Nonvolatile memories using floating quantum dot gates are included in vertical stacking format. Nonvolatile random access memories are integrated as a stack. Also described is the use of 3-layer stack of QDC-FETs making compact electrical circuits interfacing pixels for an active matrix flat panel displays that results in high resolution. Ge or Si quantum dot transport channel based devices processing spin polarized electrons introduced by magnetic tunnel junctions are described for multi-state coherent logic.


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