The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Dec. 28, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Aravind Ganesan, Bengaluru, IN;

Jaiganesh Balakrishnan, Bengaluru, IN;

Nagarajan Viswanathan, Bengaluru, IN;

Yeswanth Guntupalli, Guntur, IN;

Ajai Paulose, Idukki, IN;

Mathews John, Bengaluru, IN;

Jagannathan Venkataraman, Bengaluru, IN;

Neeraj Shrivastava, Bengaluru, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/02 (2006.01); G11C 17/14 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01);
U.S. Cl.
CPC ...
G11C 29/028 (2013.01); G11C 17/146 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G11C 29/027 (2013.01);
Abstract

A one-time write, read-only memory for storing trimming parameters includes an address pointer table, a fixed packet portion, and a flexible packet portion. The fixed packet portion includes one or more fixed packets, each fixed packet including trimming parameters for a component identified for trimming during a design phase. The flexible packet portion includes one or more flexible packets of different types. Each flexible packet includes trimming parameters for a component identified for trimming after the design phase. One packet type includes a length section and a number of fields equal to a value stored in the length section. Each field includes an address, a trimming parameter, and a mask. Another packet type includes trimming parameters associated with operands in operating instructions for a microcontroller, where the operands include an address and a mask.


Find Patent Forward Citations

Loading…