The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

May. 28, 2013
Applicant:

Saint Regis Mohawk Tribe, Akwesasne, NY (US);

Inventors:

Jon M. Huppenthal, Colorado Springs, CO (US);

Timothy J. Tewalt, Larkspur, CO (US);

Lee A. Burton, Divide, CO (US);

David E. Caliga, Fort Worth, TX (US);

Assignee:

FG SRC LLC, Dallas, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 15/173 (2006.01); G11C 11/406 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1075 (2013.01); G06F 3/0604 (2013.01); G06F 3/0644 (2013.01); G06F 3/0689 (2013.01); G06F 12/0246 (2013.01); G06F 15/17331 (2013.01); G11C 11/40615 (2013.01);
Abstract

A multi-processor computer architecture incorporating distributed multi-ported common memory modules wherein each of the memory modules comprises a control block functioning as a cross-bar router in conjunction with one or more associated memory banks or other data storage devices. Each memory module has multiple I/O ports and the ability to relay requests to other memory modules if the desired memory location is not found on the first module. A computer system in accordance with the invention may comprise memory module cards along with processor cards interconnected using a baseboard or backplane having a toroidal interconnect architecture between the cards.


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