The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Sep. 06, 2017
Applicant:

Google Llc, Mountain View, CA (US);

Inventors:

Osman Koyuncu, San Diego, CA (US);

William A. Drewry, Nashville, TN (US);

Xiaowen Xin, San Francisco, CA (US);

Assignee:

Google LLC, Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); H04L 9/32 (2006.01); G06F 21/70 (2013.01); G06F 21/84 (2013.01); G06F 21/81 (2013.01); G06F 21/83 (2013.01); H04W 12/06 (2009.01); G06F 21/31 (2013.01); G06F 21/55 (2013.01); H04L 29/06 (2006.01); G06F 7/04 (2006.01); H04W 12/00 (2009.01);
U.S. Cl.
CPC ...
G06F 21/70 (2013.01); G06F 21/31 (2013.01); G06F 21/552 (2013.01); G06F 21/81 (2013.01); G06F 21/83 (2013.01); G06F 21/84 (2013.01); H04L 9/3226 (2013.01); H04L 63/08 (2013.01); H04W 12/06 (2013.01); G06F 2221/2111 (2013.01); H04W 12/00504 (2019.01);
Abstract

The present disclosure describes use of two security processors for a mobile device. In some aspects, a first security processor device embodied in a security component of an apparatus receives a user input via an input device and transmits a security condition signal to a second security processor device embodied in a System on Chip (SoC) component of the apparatus, causing the SoC component to perform a security operation. In other aspects, the first security processor receives a signal via a sensor device sensing environmental conditions surrounding the apparatus and, in response, transmits a security condition signal to the second security processor, causing the SoC component to perform a security operation. The security operation is directly controlled, maintained, and implemented by the second security processor embodied in the SoC component.


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