The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

May. 18, 2012
Applicants:

Christopher Thomas Cheng, Santa Clara, CA (US);

Sau Yan Keith LI, Ontario, CA;

Thomas Edward Dewey, Menlo Park, CA (US);

Franciscus W. Sijstermans, Los Altos Hills, CA (US);

Inventors:

Christopher Thomas Cheng, Santa Clara, CA (US);

Sau Yan Keith Li, Ontario, CA;

Thomas Edward Dewey, Menlo Park, CA (US);

Franciscus W. Sijstermans, Los Altos Hills, CA (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 13/16 (2013.01); Y02D 10/14 (2018.01);
Abstract

Embodiments of the present invention may be directed to a graphics system of a computer system. The system may include a frame buffer having a number of partitions respectively mapped to a number of discrete memory devices and a dedicated copy buffer operable to store new image frames, mapped to a first memory device. The first memory device corresponds to a first partition of the number of partitions. The system may also include a loader circuit coupled between the frame buffer and the dedicated copy buffer, operable to copy new image frames from the frame buffer to the dedicated copy buffer. The system may also include a clocked output coupled to receive an image frame from the dedicated copy buffer and operable to drive a display device therewith. The system may enter a low power state wherein a number of the discrete memory devices are powered off.


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