The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2020

Filed:

Jan. 20, 2017
Applicant:

Seagate Technology Llc, Cupertino, CA (US);

Inventors:

Alex Tang, Cupertino, CA (US);

Leonid Baryudin, San Jose, CA (US);

Timothy Canepa, Los Gatos, CA (US);

Jackson Ellis, Fort Collins, CO (US);

Assignee:

SEAGATE TECHNOLOGY LLC, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/128 (2016.01); G06F 12/02 (2006.01); G06F 12/0868 (2016.01); G06F 12/0888 (2016.01);
U.S. Cl.
CPC ...
G06F 12/128 (2013.01); G06F 12/0246 (2013.01); G06F 12/0292 (2013.01); G06F 12/0868 (2013.01); G06F 12/0888 (2013.01); G06F 2212/217 (2013.01); G06F 2212/222 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7205 (2013.01);
Abstract

The implementations described herein provide a hybrid drive with a storage capacity including solid-state drive (NAND) technology and hard disc drive (HDD) technology. A translation layer is stored in the solid-state drive and includes plurality of entries. Each entry of the plurality of entries corresponds to at least one logical data unit and includes a cache state indicating where the data corresponding to the logical data unit is located and whether the data is valid. The translation layer may be a multi-layer map that includes a sparse mapping scheme. In a sparse multi-layer map, entries are leaf entries or non-leaf entries. Leaf entries include a cache state for the corresponding logical data unit(s). Non-leaf entries may include a pointer to a lower level mapping for a plurality of logical data units.


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