The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2020

Filed:

Feb. 28, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventors:

Yusuke Arayashiki, Yokkaichi Mie, JP;

Nobuyuki Momo, Yokkaichi Mie, JP;

Motohiko Fujimatsu, Kuwana Mie, JP;

Akira Hokazono, Kawasaki Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2481 (2013.01); H01L 27/2436 (2013.01); H01L 45/142 (2013.01); H01L 45/144 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01);
Abstract

A storage device includes: a substrate; a first conductive layer extending in a first direction; a second conductive layer adjacent to the first conductive layer in a second direction, and extending in the first direction; a third conductive layer extending in a third direction; a fourth conductive layer extending in the second direction; a fifth conductive layer disposed on the second conductive layer, extending in the third direction, and being electrically connected to the fourth conductive layer; a first storage layer disposed between the third conductive layer and the fourth conductive layer; a first semiconductor layer disposed between the first conductive layer and the third conductive layer; a second semiconductor layer disposed between the second conductive layer and the fifth conductive layer; and a first gate electrode extending in the second direction and being shared by side surfaces of the first semiconductor layer and the second semiconductor layer.


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