The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2020
Filed:
Nov. 12, 2019
Applicant:
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Inventors:
Jae Taek Kim, Seoul, KR;
Hye Yeong Jung, Seoul, KR;
Assignee:
Sk hynix Inc., Icheon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11575 (2017.01); H01L 27/11524 (2017.01); H01L 27/11556 (2017.01); H01L 27/11548 (2017.01); G11C 16/08 (2006.01); H01L 27/1157 (2017.01); H01L 27/11582 (2017.01); H01L 27/11573 (2017.01); G11C 16/04 (2006.01); H01L 27/11529 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11575 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11529 (2013.01); H01L 27/11548 (2013.01); H01L 27/11556 (2013.01); H01L 27/11573 (2013.01); H01L 27/11582 (2013.01);
Abstract
The present technology relates to a semiconductor memory device. The semiconductor memory device includes a plurality of channel plugs disposed in a cell region of a semiconductor substrate, a first dummy region disposed at one end portion of the cell region and a second dummy region disposed at an other end portion of the cell region, and first dummy plugs disposed in the first dummy region and second dummy plugs disposed in the second dummy region. The number of the first dummy plugs is different than the number of the second dummy plugs.