The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2020
Filed:
Nov. 21, 2018
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Se Hun Kang, Gyeonggi-do, KR;
Deok Sin Kil, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); G11C 11/22 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/115 (2013.01); G11C 11/22 (2013.01); H01L 28/00 (2013.01); G11C 11/223 (2013.01);
Abstract
A non-volatile memory device may include a semiconductor substrate, a ferroelectric layer, a source, a drain, a gate and a channel region. The semiconductor substrate may have a recess. The ferroelectric layer may be formed in the recess. The source may be arranged at a first side of the recess. The drain may be arranged at a second side of the recess opposite to the first side. The gate may be arranged on the ferroelectric layers. The channel region may be formed on the recess between the source and the drain.