The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2020

Filed:

Apr. 19, 2018
Applicant:

Didrew Technology (Bvi) Limited, San Jose, CA (US);

Inventors:

Minghao Shen, San Jose, CA (US);

Xiaotian Zhou, Fremont, CA (US);

Xiaoming Du, Shanghai, CN;

Chunbin Zhang, Fremont, CA (US);

Assignee:

DiDrew Technology (BVI) Limited, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/3114 (2013.01); H01L 23/3128 (2013.01); H01L 23/481 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 24/16 (2013.01); H01L 24/97 (2013.01);
Abstract

Disclosed is a semiconductor device and method of manufacturing a semiconductor device that includes planarizing surfaces of a semiconductor substrate and a carrier substrate and then placing the semiconductor substrate on the carrier substrate such that the planarized surfaces of each are adjoining and allowing the semiconductor substrate to bond to the carrier substrate using a Van der Waals force. The method also includes forming a metal filled trench around the semiconductor substrate and in contact with the carrier substrate, which can also be formed of metal. The metal filled trench and carrier substrate together form a metal cage-like structure around the semiconductor substrate that can serve as a heat sink, integrated heat spreader, and Electro-Magnetic Interference shield for the semiconductor substrate.


Find Patent Forward Citations

Loading…