The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2020
Filed:
Jul. 05, 2019
Toshiba Mitsubishi-electric Industrial Systems Corporation, Chuo-ku, JP;
Chikara Morito, Chuo, JP;
Hiromitsu Suzuki, Chuo, JP;
Abstract
In a motor drive system with inverter parallel connection, a laying cable impedance is identified by a test pulse, and a cross current suppression control gain is optimized to provide a power conversion apparatus that does not require a coupling reactor. In the motor drive systemin which the outputs of A-bank and B-bank invertersA andB are connected in parallel, a test pulse is outputted from the drive control unitprovided with the PWM controllerto the A and B bank inverters before operation. The laying cable impedance is identified from the DC voltage Vdc at the time of test pulse output and the response currents IA and IB. An adjustment gain is calculated from the ratio of installed cable impedance to specified cable impedance. Then, the proportional gain KP is multiplied to optimize the adjustment gain, and an on-delay time based on the optimized adjustment gain GL×KP is calculated during operation. The gate signal corrected by the calculated on-delay time is outputted to the corresponding inverter gate.