The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Jan. 26, 2018
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Hermann Gruber, Woerth a. D., DE;

Markus Muellauer, Faak am See, AT;

Matthias Stecher, Munich, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76264 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/5227 (2013.01); H01L 23/5228 (2013.01); H01L 21/76283 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate having a first region and a second region. The semiconductor device also includes an insulating structure laterally between the first region and the second region in the semiconductor substrate. The insulating structure electrically insulates the first region laterally from the second region in the semiconductor substrate. The semiconductor device further includes a connecting structure at a surface of the semiconductor substrate. The connecting structure contacts at least a sub-structure of the insulating structure and at least one of the first region and the second region. At least a sub-structure of the connecting structure has an electrical resistivity greater than 1*10Ωm and less than 1*10Ωm.


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