The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2020
Filed:
Jul. 03, 2019
Xilinx, Inc., San Jose, CA (US);
Martin L. Voogel, Niwot, CO (US);
Trevor J. Bauer, Boulder, CO (US);
Henri Fraisse, Sunnyvale, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
A programmable logic device with fabric regularity is disclosed. For example, the programmable logic device may include a plurality of similar heterogeneous logic blocks. A user's design may be implemented within a first group of heterogeneous logic blocks. The user's design may be moved or copied to a second group of heterogeneous logic blocks. More specifically, routing, timing, and/or placement information associated with the implementation of the users design in the first group of heterogeneous logic blocks may be used to implement the user's design in the second group of heterogeneous logic blocks.