The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2020
Filed:
Dec. 18, 2017
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Kumar Rahul, Hyderabad, IN;
Santosh Yachareni, Hyderabad, IN;
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); H03M 13/09 (2006.01); H03M 13/27 (2006.01); H03M 13/19 (2006.01);
U.S. Cl.
CPC ...
G06F 11/004 (2013.01); H03M 13/098 (2013.01); H03M 13/271 (2013.01); H03M 13/2742 (2013.01); H03M 13/19 (2013.01);
Abstract
An integrated circuit (IC) includes an encoder circuit configured to receive input data including a plurality of data bits. A plurality of parity computation equations for a single error correct double error detect adjacent double error correct adjacent triple error detect (SECDEDADECADTED) Hamming code is received. A plurality of parity bits are computed using the plurality of parity computation equations. Write data including the data bits and the parity bits are provided to a write circuit. The write circuit writes the write data to a memory.