The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Sep. 12, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Anil Krishna, Lakeway, TX (US);

Yongseok Yi, Cary, NC (US);

Eric Rotenberg, Raleigh, NC (US);

Vignyan Reddy Kothinti Naresh, Morrisville, NC (US);

Gregory Michael Wright, Chapel Hill, NC (US);

Assignee:

Qualcomm Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 9/38 (2018.01); G06N 3/063 (2006.01); G06N 5/02 (2006.01); G06F 12/123 (2016.01); G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G06F 9/3832 (2013.01); G06F 9/3808 (2013.01); G06F 9/3848 (2013.01); G06F 12/123 (2013.01); G06N 3/063 (2013.01); G06N 5/02 (2013.01); G06N 20/00 (2019.01);
Abstract

Providing variable interpretation of usefulness indicators for memory tables in processor-based systems is disclosed. In one aspect, a memory system comprises a memory table providing multiple memory table entries, each including a usefulness indicator. A memory controller of the memory system comprises a global polarity indicator representing how the usefulness indicator for each memory table entry is interpreted and updated by the memory controller. If the global polarity indicator is set, the memory controller interprets a value of each usefulness indicator as directly corresponding to the usefulness of the corresponding memory table entry. Conversely, if the global polarity indicator is not set, the polarity is reversed such that the memory controller interprets the usefulness indicator value as inversely corresponding to the usefulness of the corresponding memory table entry. In this manner, the interpretation and updating of usefulness indicators by the memory controller can be varied using the global polarity indicator.


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