The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Oct. 19, 2017
Applicant:

Wuhan China Star Optoelectronics Technology Co., Ltd., Wuhan, Hubei, CN;

Inventors:

Shuanghua Zeng, Hubei, CN;

Zhihao Cao, Hubei, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); G06F 3/041 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/50 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0412 (2013.01); H01L 21/56 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/50 (2013.01);
Abstract

An integrated circuit pin is provided. The integrated circuit pin includes a glass substrate, a buffer layer above the glass substrate, a gate insulating layer above the buffer layer, a first metal layer above the gate insulating layer, a second metal layer above the first metal layer, a first insulating layer above the second metal layer, a second insulating layer above the first insulating layer, a bottom indium tin oxide (BITO) above the second insulating layer, and a top indium tin oxide covering the BITO. The BITO further extends downwardly along the inner wall of a through-hole penetrating through the first and second insulating layers such that the BITO is connected to the second metal layer. An in-cell touch panel is also provided. According to the disclosure, the thickness of the conductive layer can be increased. The anti-external interference and the drop reliability of ITP products can be enhanced.


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