The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Sep. 16, 2019
Applicant:

Sharp Kabushiki Kaisha, Sakai, Osaka, JP;

Inventors:

Hikaru Yoshino, Sakai, JP;

Junichi Morinaga, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1333 (2006.01); G09G 3/36 (2006.01); G02F 1/136 (2006.01); G06F 3/041 (2006.01); G06F 3/044 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13338 (2013.01); G02F 1/136 (2013.01); G06F 3/044 (2013.01); G06F 3/0412 (2013.01); G09G 3/3648 (2013.01); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01);
Abstract

An active matrix substrate includes: a TFT being disposed on each of a plurality of pixel regions and including an oxide semiconductor layer; an interlayer insulating layer covering the TFT; and a plurality of pixel electrodes, a common electrode including a plurality of common electrode subportions, and a plurality of first wiring lines which are disposed on the interlayer insulating layer. Source and drain electrodes of the TFT are disposed on the oxide semiconductor layer via an upper insulating layer; the source electrode and the drain electrode are electrically connected to the oxide semiconductor layer within, respectively, a source-side aperture and a drain-side aperture which are made in the upper insulating layer; the active matrix substrate further includes a first contact portion which connects the drain electrode with one of the pixel electrodes and a second contact portion which connects one of the common electrode subportions with one of the first wiring lines; and, when viewed from a normal direction of a principal face of the substrate, the first contact portion at least partially overlaps the drain-side aperture, and the second contact portion at least partially overlaps the source-side aperture of the TFT that is disposed in one of the plurality of pixel regions.


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