The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Apr. 08, 2019
Applicant:

Semitronix Corporation, Hangzhou, CN;

Inventor:

Fan Lan, Hangzhou, CN;

Assignee:

Semitronix Corporation, Hangzhou, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31722 (2013.01); G01R 31/2882 (2013.01); G01R 31/2886 (2013.01);
Abstract

An address register includes a plurality of edge-triggered flip-flop registers having an input D, an input R, an input CK, and an output Q; a counter logic; a shifter logic; a multiplexer; input ports including a reset signal RST, a clock signal CLK, a shift enable signal SE, a shift data input signal SI; an output port including address signals ADDR. D is coupled to a data output of the multiplexer; R is coupled to a reset (RST) pad; CK is coupled to a clock (CLK) pad; Q is coupled to an address (ADDR) pad; an input of the counter logic is coupled to ADDR; an input of the shifter logic is coupled to ADDR and the shift data input signal SI; an input of the multiplexer is coupled to SE, an output of the counter logic, and an output of the shifter logic.


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