The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2020

Filed:

Mar. 12, 2019
Applicant:

Government of the United States, As Represented BY the Secretary of the Air Force, Wright-Patterson AFB, OH (US);

Inventors:

Matthew LaRue, Columbus, OH (US);

Waleed Khalil, Dublin, OH (US);

Tony Quach, Lebanon, OH (US);

Brian Dupaix, Columbus, OH (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2006.01); H04L 27/36 (2006.01); H03K 19/20 (2006.01); G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
H03L 7/081 (2013.01); G06F 1/10 (2013.01); H03K 19/20 (2013.01); H04L 27/36 (2013.01);
Abstract

A frequency-agile phase modulator with glitch-free multiplexer in CMOS process technologies for applications including wireless communications, radar, automotive radar, etc. Examples herein offer a novel phase modulator architecture that, when combined with either a wideband power amplifier or multiple narrowband amplifiers, allows for a single transmitter to transmit radar, communication, telemetry, or other similar waveforms across multiple frequency bands. The embodiments herein allow one transmitter to cover a very large operating frequency range, resulting in a decrease in size, weight, power consumption, and cost for future 'small' platform systems. In an embodiment, the phase modulator circuit includes a reconfigurable delay-locked loop (DLL) circuit that is configured to receive a radio frequency (RF) input signal (RF) and a configuration signal. The phase modulator circuit also includes a frequency-agile, glitch-free multiplexer circuit configured to receive an oversampled baseband clock signal (clk) and a phase select data input signal.


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