The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2020
Filed:
Aug. 04, 2017
Applicant:
Dialog Semiconductor (Uk) Limited, London, GB;
Inventors:
Daisuke Kobayashi, Tokyo, JP;
Julian Tyrrell, Swindon, GB;
Assignee:
Dialog Semiconductor (UK) Limited, London, GB;
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/26 (2006.01); H03B 5/02 (2006.01); H03K 3/354 (2006.01); H03K 3/0231 (2006.01); H03B 1/02 (2006.01); H03K 4/502 (2006.01);
U.S. Cl.
CPC ...
H03B 5/02 (2013.01); H03B 1/02 (2013.01); H03K 3/0231 (2013.01); H03K 3/354 (2013.01); H03B 2200/005 (2013.01); H03B 2200/0062 (2013.01); H03B 2200/0082 (2013.01); H03B 2201/0275 (2013.01); H03K 4/502 (2013.01);
Abstract
Relax oscillation circuits have at least one comparison circuit that is structured with a flipped gate transistor and a normal MOS transistor wherein the two transistors having different threshold voltages. The relaxation oscillators are configured for charging and discharging capacitances between the threshold voltages of the flipped gate transistor and the normal MOS transistor by toggling the state of a latching circuit to control the charging and discharging of the capacitances.