The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2020
Filed:
Jul. 23, 2019
Applicant:
Hrl Laboratories, Llc, Malibu, CA (US);
Inventors:
Terence J. DeLyon, Newbury Park, CA (US);
Rajesh D. Rajavel, Oak Park, CA (US);
Sevag Terterian, Lake Balboa, CA (US);
Minh B. Nguyen, Thousand Oaks, CA (US);
Hasan Sharifi, Agoura Hills, CA (US);
Assignee:
HRL Laboratories, LLC, Malibu, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0352 (2006.01); H01L 27/144 (2006.01); H01L 31/0304 (2006.01); H01L 31/18 (2006.01); H01L 31/0368 (2006.01); H01L 31/02 (2006.01); H01L 31/109 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1443 (2013.01); H01L 27/1446 (2013.01); H01L 31/02019 (2013.01); H01L 31/03046 (2013.01); H01L 31/0368 (2013.01); H01L 31/109 (2013.01); H01L 31/1844 (2013.01); H01L 31/1868 (2013.01);
Abstract
Methods of fabrication and monolithic integration of a polycrystalline infrared detector structure deposit Group III-V compound semiconductor materials at a low deposition temperature within a range of about 300° C. to about 400° C. directly on an amorphous template. The methods provide wafer-level fabrication of polycrystalline infrared detectors and monolithic integration with a readout integrated circuit wafer for focal plane arrays.