The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2020

Filed:

Oct. 23, 2018
Applicant:

Olympus Corporation, Hachioji-shi, Tokyo, JP;

Inventors:

Ryusuke Tsuchida, Tokyo, JP;

Akira Ueno, Tokyo, JP;

Assignee:

OLYMPUS CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 13/28 (2006.01); G09G 5/395 (2006.01); G09G 5/00 (2006.01); G09G 5/393 (2006.01); G06F 3/147 (2006.01); G06T 1/60 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1673 (2013.01); G06F 3/147 (2013.01); G06F 13/28 (2013.01); G06T 1/60 (2013.01); G09G 5/003 (2013.01); G09G 5/393 (2013.01); G09G 5/395 (2013.01); G09G 2360/127 (2013.01);
Abstract

A direct memory access (DMA) buffer section configured to store data in a plurality of storage regions in units of DMA transfers, a buffer control section configured to output a first writing permission signal for permitting the DMA transfer on the basis of presence or absence of a free storage region, a smoothing buffer control section configured to output a second writing permission signal for permitting the DMA transfer within a predetermined period, a buffer writing control section configured to execute the DMA transfer according to the first writing permission signal and the DMA transfer according to the second writing permission signal and stored the data to the free storage region, and a buffer reading control section configured to sequentially read the data for each storage region, wherein a predetermined amount of data sequentially acquired by a plurality of DMA transfers is output as a transfer unit.


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