The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2020

Filed:

Nov. 12, 2018
Applicant:

Amazon Technologies, Inc., Reno, NV (US);

Inventors:

Jeffrey K. Lassahn, Portland, OR (US);

Timothy B. Prins, Hillsboro, OR (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06T 1/60 (2006.01); H04N 7/00 (2011.01); G11C 8/00 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G06F 12/02 (2013.01); G06T 1/60 (2013.01); H04N 7/00 (2013.01); G11C 7/1006 (2013.01); G11C 8/00 (2013.01);
Abstract

An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.


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