The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2020

Filed:

Apr. 24, 2018
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Joshua Liang, Toronto, CA;

Ali Sheikholeslami, Toronto, CA;

Sanroku Tsukamoto, Setagaya, JP;

Hirotaka Tamura, Yokohama, JP;

Hisakatsu Yamaguchi, Kawasaki, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); G01R 25/04 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31709 (2013.01); G01R 25/04 (2013.01);
Abstract

A jitter measurement circuit includes an addition circuit to add a digital rectangular signal to an adjustment signal generated by a circuit that generates a first error signal based on a phase difference between a first clock signal or a data signal on which the first clock signal is superimposed and a second clock signal and generates the adjustment signal by filtering the first error signal, and a calculation circuit to calculate a first correlation value for representing an autocorrelation of the first error signal when the rectangular signal is not added to the adjustment signal, and a second correlation value for representing the autocorrelation when the rectangular signal is added to the adjustment signal, based on the first error signal and a second error signal obtained by delaying the first error signal by a variable delay amount, and output the first correlation value and the second correlation value.


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