The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2020

Filed:

Jan. 31, 2019
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Takashi Numagi, Hachioji, JP;

Shoji Matsumoto, Fujisawa, JP;

Hiroyuki Yamaguchi, Yokohama, JP;

Youhei Tazawa, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/18 (2006.01); H04N 5/225 (2006.01); H04N 5/232 (2006.01);
U.S. Cl.
CPC ...
H05K 1/115 (2013.01); H04N 5/2253 (2013.01); H05K 1/111 (2013.01); H05K 1/181 (2013.01); H04N 5/23206 (2013.01); H05K 2201/09227 (2013.01); H05K 2201/09263 (2013.01); H05K 2201/10159 (2013.01);
Abstract

A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.


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