The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2020
Filed:
Oct. 05, 2018
Qualcomm Incorporated, San Diego, CA (US);
Joshua Puckett, Raleigh, NC (US);
Alexander Tessitore, Raleigh, NC (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Circuits and methods for balancing Bias Temperature Instability (BTI) are disclosed. An inverter circuit comprises an inverter input node configured to receive an inverter input signal, wherein the inverter input node is coupled to gates of an inverter pair, wherein the inverter pair includes an inverter pair n-type metal-oxide-semiconductor (NMOS) transistor and an inverter pair p-type metal-oxide-semiconductor (PMOS) transistor, an inverter output node configured to provide an inverter output signal, wherein the inverter output signal is an inversion of the inverter input signal, and at least one balancing transistor configured to balance a voltage at a source of the inverter pair PMOS, a source of the inverter pair NMOS, or any combination thereof.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile