The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2020
Filed:
Jul. 02, 2018
Applicant:
Imec Vzw, Leuven, BE;
Inventors:
Liesbeth Witters, Lubbeek, BE;
Kurt Wostyn, Lubbeek, BE;
Assignee:
IMEC VZW, Leuven, BE;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/775 (2006.01); H01L 21/311 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66742 (2013.01); H01L 21/02164 (2013.01); H01L 21/02236 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/28255 (2013.01); H01L 21/31111 (2013.01); H01L 29/0653 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/775 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01);
Abstract
Example embodiments relate to germanium nanowire fabrication. One embodiment includes a method of forming a semiconductor device that includes at least one Ge nanowire. The method includes providing a semiconductor structure that includes at least one, the at least one fin including a stack of at least one Ge layer alternative with SiGe layers. The method also includes at least partially oxidizing the SiGe layer into SiGeO. Further, the method includes capping the fin with a dielectric material. In addition, the method includes annealing. Still further, the method includes selectively removing the dielectric material and the SiGeO.