The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2020

Filed:

Mar. 06, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Harumi Seki, Kawasaki, JP;

Yuichiro Mitani, Yokkaichi, JP;

Takamitsu Ishihara, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); G11C 8/14 (2006.01); H01L 23/522 (2006.01); H01L 27/11565 (2017.01); H01L 27/11563 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); G11C 8/14 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11563 (2013.01); H01L 27/11565 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes: a first interconnect layer; a second interconnect layer adjacent to the first interconnect layer; a semiconductor layer between the first and second interconnect layers; a first charge storage layer between the first interconnect layer and the semiconductor layer; and a second charge storage layer between the second interconnect layer and the semiconductor layer. A first distance between the first and second interconnect layers is shorter than a second distance between the first and second charge storage layers.


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