The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2020

Filed:

Apr. 09, 2018
Applicant:

Institut Vedecom, Versailles, FR;

Inventors:

Hadi Alawieh, Sotteville-les-Rouen, FR;

Menouar Ameziani, Guyancourt, FR;

Assignee:

INSTITUT VEDECOM, Versailles, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/427 (2006.01); F28D 15/04 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 23/427 (2013.01); F28D 15/04 (2013.01); H01L 25/071 (2013.01);
Abstract

The module (PM) has an architecture with 3D stacking of the electronic power switching chips (IT, ID) and comprises first and second dielectric substrates (SH, SL) that are intended to come into thermal contact with first and second heat sinks (DH, DL), respectively, at least one pair of first and second stacked electronic power switching chips (IT, ID; IT, ID) and a common intermediate substrate (SC), the first and second electronic power switching chips being sandwiched between the first dielectric substrate and the common intermediate substrate and between the common intermediate substrate and the second dielectric substrate, respectively. According to the invention, the common intermediate substrate is a metal element formed as a single piece and comprises a central portion for the implantation of the electronic power switching chips and at least one.


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