The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2020

Filed:

Feb. 19, 2020
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Hiroyuki Takahashi, Tokyo, JP;

Muneaki Matsushige, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 7/06 (2006.01); H01L 27/108 (2006.01); G11C 11/409 (2006.01); G11C 7/08 (2006.01); G11C 11/4091 (2006.01); G11C 11/4074 (2006.01);
U.S. Cl.
CPC ...
G11C 7/06 (2013.01); G11C 5/147 (2013.01); G11C 7/065 (2013.01); G11C 7/08 (2013.01); G11C 11/409 (2013.01); G11C 11/4074 (2013.01); G11C 11/4091 (2013.01); H01L 27/108 (2013.01);
Abstract

Even when a driven circuit has a large-scale load, a small-scale step-down driver circuit can supply an internal potential to the driven circuit at high speed. A semiconductor integrated circuit device includes a step-down driver circuit which supplies, to a driven circuit to be driven by an internal potential lower than an external potential supplied from an external power supply, the internal potential. The step-down driver circuit includes an NMOS transistor having a drain coupled to an external power supply terminal to be coupled to the external power supply and a source to be coupled to a voltage supply point of the driven circuit and a driver circuit to drive the gate of the NMOS transistor.


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