The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10712772 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 14, 2020

Filed:

Mar. 26, 2018
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Antonius Martinus Jacobus Daanen, Beuningen, NL;

Guillaume Lemaitre, Blainville sur Orne, FR;

William Gerard Leijenaar, Tegelen, NL;

Michael Levi, Beuningen, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/16 (2006.01); H03K 19/003 (2006.01); G06F 1/12 (2006.01); G06F 1/08 (2006.01); H03K 5/12 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); G06F 1/08 (2013.01); H03K 5/12 (2013.01); H03K 19/00323 (2013.01); G06F 13/4068 (2013.01);
Abstract

A data-processing-circuit comprising: a clock-input-terminal configured to receive a clock-signal; a data-output-terminal configured to provide a data-output-signal; an adjustable-driver-buffer configured to: receive a data-signal; and apply a driver-strength-value to the data-signal in order to provide a data-output-signal, wherein the current level of the data-output-signal is based on the driver-strength-value; and a driver-control-module comprising: a time-alignment-module configured to: process the clock-signal and the data-output-signal in order to determine a timing-delay-signal that is representative of a time delay between: a transition in the clock-signal; and a transition in the data-output-signal; provide the driver-strength-value for the adjustable-driver-buffer based on the timing-delay-signal and a target-delay-signal, wherein the driver-strength-value is for reducing a difference between: the timing-delay-signal; and the target-delay-signal.


Find Patent Forward Citations

Daanen, Antonius Martinus Jacobus. (2020). Data processing circuits (U.S. Patent No. 10712772). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10712772

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