The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2020
Filed:
Aug. 16, 2017
Applicant:
Oracle International Corporation, Redwood City, CA (US);
Inventors:
Dabin Zhang, Santa Clara, CA (US);
Philip P. Kwan, San Francisco, CA (US);
Zuxu Qin, Palo Alto, CA (US);
Assignee:
Oracle International Corporation, Redwood Shores, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); H03K 19/0185 (2006.01); H03F 3/45 (2006.01); H03K 5/15 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); H03F 3/45183 (2013.01); H03K 5/1506 (2013.01); H03K 19/018528 (2013.01); H03F 2203/45332 (2013.01); H03F 2203/45702 (2013.01);
Abstract
A clock distribution network and method of distributing a clock signal is disclosed. In one embodiment, a clock distribution network is coupled to at least a first circuit. The clock distribution network includes a clock source configured to generate a differential clock signal and provide it to a current mode logic (CML) driver. The CML driver is configured to transmit the clock signal over a differential signal path. A CML receiver is coupled to receive the clock signal via the differential signal path.