The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Nov. 26, 2018
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Lucian Shifren, San Jose, CA (US);

Kimberly Gay Reid, Austin, TX (US);

Gregory Munson Yeric, Austin, TX (US);

Manuj Rathor, Fremont, CA (US);

Glen Arnold Rosendale, Palo Alto, CA (US);

Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 27/24 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 45/14 (2013.01); H01L 25/50 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 45/04 (2013.01); H01L 45/065 (2013.01); H01L 45/10 (2013.01); H01L 45/1233 (2013.01); H01L 45/145 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); H01L 45/16 (2013.01);
Abstract

Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform specified application performance parameters. In embodiments, CEM devices fabricated at a first stage of a wafer fabrication process, such as a front-end-of-line stage, may differ from CEM devices fabricated at a second stage of a wafer fabrication process, such as a middle-of-line stage or a back-end-of-line stage, for example.


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