The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

May. 17, 2019
Applicant:

Lg Electronics Inc., Seoul, KR;

Inventors:

Junghoon Kim, Seoul, KR;

Changseo Park, Seoul, KR;

Bongchu Shim, Seoul, KR;

Byoungkwon Cho, Seoul, KR;

Hyunwoo Cho, Seoul, KR;

Assignee:

LG ELECTRONICS INC., Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/38 (2010.01); H01L 33/20 (2010.01); H01L 33/40 (2010.01); H01L 33/44 (2010.01); H01L 25/075 (2006.01); H01L 33/00 (2010.01); H01L 33/62 (2010.01);
U.S. Cl.
CPC ...
H01L 33/38 (2013.01); H01L 25/0753 (2013.01); H01L 33/0095 (2013.01); H01L 33/20 (2013.01); H01L 33/40 (2013.01); H01L 33/44 (2013.01); H01L 33/62 (2013.01); H01L 2933/0033 (2013.01);
Abstract

The present disclosure relates a display device including a semiconductor light emitting device, and a substrate having a receiving groove in which the semiconductor light emitting device is accommodated, wherein the semiconductor light emitting device includes a first conductive semiconductor layer, a second conductive semiconductor layer disposed at an upper portion of the first conductive semiconductor layer, a first conductive electrode disposed on the first conductive semiconductor layer, and a second conductive electrode disposed on the second conductive semiconductor layer, and spaced apart from the first conductive electrode along a horizontal direction, wherein when the semiconductor light emitting device is assembled into the receiving groove, the first conductive semiconductor layer has an asymmetrical shape with respect to at least one direction so that the first conductive electrode and the second conductive electrode are arranged at preset positions.


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