The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Sep. 13, 2018
Applicant:

Silanna Asia Pte Ltd, Singapore, SG;

Inventor:

David Snyder, Beaverton, OR (US);

Assignee:

Silanna Asia Pte Ltd, Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 27/06 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7816 (2013.01); H01L 27/0617 (2013.01); H01L 29/086 (2013.01); H01L 29/0878 (2013.01); H01L 29/1095 (2013.01);
Abstract

An improved laterally diffused MOSFET (LDMOS) device enables an ability to tune some device parameters independently of other device parameters and/or provides a device architecture with component dimensions that significantly improve device performance. The LDMOS device includes a stepped gate having a first portion with a thin gate insulator over a body region and a second portion with a thick gate insulator over part of a drift region. In some embodiments, a gate shield is disposed over another part of the drift region to reduce a gate-drain capacitance of the LDMOS device. In some embodiments, the LDMOS device has a specific resistance (Rsp) of about 5-8 mOhm*mm, a gate charge (Qg) of about 1.9-2.0 nC/mm, and an Rsp*Qg product figure of merit of about 10-15 mOhm*nC.


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