The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

May. 30, 2018
Applicant:

Fuji Electric Co., Ltd., Kawasaki-shi, Kanagawa, JP;

Inventor:

Ryo Maeta, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki-Shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/761 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0634 (2013.01); H01L 21/761 (2013.01); H01L 29/66712 (2013.01); H01L 29/66734 (2013.01); H01L 29/7802 (2013.01); H01L 29/7811 (2013.01); H01L 29/7813 (2013.01); H01L 29/0638 (2013.01);
Abstract

A semiconductor device has a termination structure region that includes a lower parallel pn structure having lower first-columns of a first conductivity type and lower second-columns of a second conductivity type; a center parallel pn structure having center first-columns of the first conductivity type and first rings of the second conductivity type; an upper parallel pn structure having upper first-columns of the first conductivity type and upper second-columns of the second conductivity type; and an uppermost parallel pn structure having uppermost first-columns of the first conductivity type and second rings of the second conductivity type. The first and second rings are wider than the lower second-columns. An interval between the first rings and between the second rings is wider than an interval between the lower second-columns. Positions of the first rings differ from positions of the second rings, along a direction parallel to a front surface of the semiconductor device.


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