The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2020
Filed:
Mar. 31, 2016
Applicant:
Sharp Kabushiki Kaisha, Sakai, Osaka, JP;
Inventor:
Seiichiro Kihara, Sakai, JP;
Assignee:
SHARP KABUSHIKI KAISHA, Sakai, Osaka, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 29/417 (2006.01); H01L 23/00 (2006.01); H01L 29/78 (2006.01); H01L 29/812 (2006.01); H01L 21/8236 (2006.01); H01L 27/095 (2006.01); H01L 27/06 (2006.01); H01L 29/866 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/8236 (2013.01); H01L 24/85 (2013.01); H01L 27/0629 (2013.01); H01L 27/0883 (2013.01); H01L 27/095 (2013.01); H01L 29/4175 (2013.01); H01L 29/41758 (2013.01); H01L 29/7816 (2013.01); H01L 29/7821 (2013.01); H01L 29/812 (2013.01); H01L 29/866 (2013.01); H01L 29/0696 (2013.01);
Abstract
A composite semiconductor device with improved response performance and reliability is provided while an increase in wiring area being suppressed. Fingersare arranged in a plurality of rows and a plurality of columns. A signal inputted via a gate terminal () is supplied from intermediate regions in a row-wise direction of gate wires () connected to gate electrodes (G) of the same row or two adjacent rows of fingersof the fingersand formed along the rows.