The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Sep. 04, 2018
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Soichiro Nakamura, Kawasaki, JP;

Tomohiro Tanaka, Sagamihara, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/38 (2006.01); G11C 29/36 (2006.01); G11C 7/24 (2006.01); G11C 7/10 (2006.01); G11C 29/32 (2006.01); G11C 29/12 (2006.01); G11C 29/46 (2006.01); G11C 29/14 (2006.01);
U.S. Cl.
CPC ...
G11C 29/38 (2013.01); G11C 7/1006 (2013.01); G11C 7/24 (2013.01); G11C 29/1201 (2013.01); G11C 29/32 (2013.01); G11C 29/36 (2013.01); G11C 29/46 (2013.01); G11C 7/1075 (2013.01); G11C 29/14 (2013.01); G11C 2029/3202 (2013.01); G11C 2207/007 (2013.01);
Abstract

A storage device includes: a first disabling unit configured to output write enable signals without change when at least two write addresses of a plurality of write addresses for which write enable signals are enabled and held by a first holding unit do not match; a second holding unit configured to hold sets of the plurality of write addresses held by the first holding unit and the plurality of write enable signals output by the first disabling unit; a second disabling unit configured to output one write enable signal of the plurality of write enable signals held by the second holding unit without change in a test mode; and a third holding unit configured to write data in accordance with sets of the plurality of write addresses held by the second holding unit and the plurality of write addresses output by the second disabling unit.


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